How can you set sampling rate of an ADC?

adc sampling rate

Hi all,

I have been searching about sampling rate setting of an ADC.

What is the main criteria (or criterias) of its operating rate? Clock frequency, equipment's time delays, or what?

Please, would you like to explain how does manufacturer set this and how user use it?

Thanks, best regards

Added after 12 minutes:

I have been using C6713 DSP starter kit. Various sampling rates can be choosen. Also everybody use sound card and we can record sound at various sampling rates.

How does this happen?

sampling sinusoidal signal

Well

I don't know details, but I think you can alter the internal clock in ADC in a way that you get the desired available frequency.

The most common question is how to choose the sampling frequency for your application, it is defined by the Sampling theorem which states that the minimum sampling frequency to adequately sample (obtain by an ADC) is double the maximum frequency of the signal you want to sample. It means that you need to know the maximum frequency your application has, if you don't know you can have an approximation, and give an guard frequency in excess.

Something very important with this sampling theorem is that you must use an antialiasing filter, (an analog fitler which rejects frequencise higher thatn the one you are interested in) otherwise you sampled frequency will be terribly wrong.

If you are a novice I recommend search for a tutorial in the net.

Sal

how to choose sampling rate of an adc

Assuming you are sampling sinusoidal signals, a pure sinusoidal signal fsin has one fundamental and no images (harmonics) in the frequency domain.
If you are sampling the sinusoidal signal fsin, the resulting images will be at fsin+/-N*fsampling where N are the harmonic orders (usually 1,3,5,.. with higher energy and 2,4,6... with lower energy) and fsampling is in accordance with the Nyquist theorem.
Once you know which frequency is ok and which frequency becomes noise on your application, you are able to determine the fsampling without being always necessary an antialising filter. The key is knowing the clear bandwidth near the fundamental where no image must appear.

With other simple words, if you are sampling a 0-20Khz sinusoidal signal with a large enough frequency sampling, you'll be able to reconstruct the signal without any antialising filter, and the result will be a quite clean signal.

how do you set adc frequency

My question is not related the Nyquist rate or antialiasing.

My question is related ADC's operating frequency setting. How can you sample a signal 8 kHz instead 16 khz? By choosing 16 kHz what are changed? I think one of them may be clock frequency

set adc to no s/h

oversampling reduces the quantization noise density.

choosing adc sampling rate

I know that I can control sampling rate by using clock (crystal) frequency.

It would be super if there is some circuit diagrams, application examples, detailed explanation of mechanism. So I can understand clearly and apply it in practice easily.

choosing a sample rate

Hello haydaa,

What Sal and Melc are trying to tell you is you have to know in advance which is your maximum signal frequency and then adjust your ADC clock to 2.1 times (raw calculation, depends on bandwidth) that frequency.
If you want to sample an 8 khz signal you can set the ADC clock to 16.8 khz. But you must be sure this signal is band-limited to 8 khz. If not sure, you MUST use an antialising lowpass filter.

c6713 sample rate

I couldn't understand why you behave like this.

I said " My problem is not X"
You insisted that " Your problem is X "

I wish plenty of points to you.

+adc +sampling +clock +response +time

Sorry about that.
Lets go to you very first question and see if this time you get the answer you're waiting.

How can you set sampling rate of an ADC?
What is the main criteria (or criterias) of its operating rate?

Click to expand...

The sampling rate of and ADC is dictated mainly by the clock frequency. How to set it is explained in their respective datasheet.
Now, there are several types of ADC. Most used are S/H (sample/hold) and SAR (Succesive Aproximation Register) type. I don't know about the kit you are using but if it has a HOLD signal chances are you are dealing with a S/H type ADC.
In a S/H type the frequency of the clock is the sampling rate because it's at that speed that the clock is switching the S/H latch to take a sample.
With a SAR the conversion is taken by a conter with a special counting algorithm. Don't going to give the details here but you can try **broken link removed** for a full explanation.
In a SAR ADC the algorithm used guaranties a succesful "guess" in a 2*log2 n -1 steps. Where n is the number of levels (256 for an 8bit ADC) so the clock frequency must be set to 2*log2 n-1 times the sampling rate you want.

Please, would you like to explain how does manufacturer set this and how user use it?

Click to expand...

Don't get you quite well in this one but the manufacturer's datasheet tells you all the details about using it and their possible applications.

Also everybody use sound card and we can record sound at various sampling rates.
How does this happen?

Click to expand...

Most sound cards have a VCF (embedded in a DSP or not) which bandwidth is indirectly set (some dedicated circutry does this) by the clock frequency and this one itself is fixed by the sampling rate you say you'll use.
Hope this time you have gotten the answer you waited

sampling rate and adc clock frequency

Hello!
May be that will help you at least when you sample sinusoidal and co-sinusoidal signals:

“A New Approach to Sampling Sinusoidal and Cosinusoidal Signals”, P T Petrov,
https://www.ieindia.org/pdf/88/88ET104.pdf

Also may be it will be useful to know:
“Sampling of the Simplest Signals” P T Petrov
https://www.ieindia.org/pdf/89/89CP109.pdf

Any feedback is welcomed
BR
Petre Petrov

adc minimum sampling frequency

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Added after 5 minutes:

tnx for your kindly response by the way.