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design of buffered opamp

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secondlife

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i wanna design buffered CMOS opamp with specs
DC gain 80db
UGB 10MHz
Slew rate 5v/50ns
ICMR -1 t0 +1
VDD(VSS) 2.5(-2.5)
CMRR should be high as much as possible
PSRR should also be as above.. above given are the main constraints.
CL=10pf
RL=2kohm
i wanna design as soon as possible.
 

There are many papers on opamp deisgn in this forum . You may search for them .
 

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