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about sigma-delta modulator

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jiangxb

jiangxb

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hi all

i have design a sigma-delta modulator chip, and now i'm measuring it. i found a question: the filtered output signal of modulator has disconnected case, as blew. in general, there are often these disconnects after a time interval. this is a 2-2 modulator.
 

I'm not sure, but may be it is due to an idle tone .Just guessing .
 

Maybe it's a data buffering problem, such as an overflowing FIFO, causing blocks of data to be repeated or skipped.
 

    jiangxb

    jiangxb

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hi ieropsaltic and echo47

these are possible, but i will verify them.

this plot is a output when input is a dc. this disturb often occurs.
 

One easy way to check for a data buffering problem is to apply a low frequency triangle wave, and look for strange output discontinuities.
 

try putting some BSF stoping the one at the disconuity. if t fine then it is the problem of tones.
 

hi sriramachandra

what is BSF? can you explain in detail? i should how to do? thank you.
 

hi echo47

maybe this is a buffering problem indeed. i used a data acquisition card to acquire the data from modulator, when i set larger buffer allocated, the discontinuity disappear.

thank you very much!
 

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