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How this code will avoid race conditions?

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kunal1514

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Hi All,

Can anybody tell me How this code will avoid race conditions ?

//------ AXI CLOCK GENERATION ------
initial
begin
#20; //------ This is to avoid race condition between "initial" and "always" block
axi_clk = 1'b0;
forever
begin
#(AXI_CLK/2) = 1;
#(AXI_CLK/2) = 0;
end
end


Regard's

Kunal Mishra
 

Re: Race Condition

I think in forever , you forgot to assign axi_clk . I guess this is psuedo code. How does this avoid race condition ? we'd be able to see if we had a always block , which here is not there! I think this might be a documentation for a older implementation . Most commonly people create clocks like

initial
begin
#20 clk =0;
end
always @ (clk)
begin
# (HALF_CLK_PERIOD) clk = ~clk;
end

Other way is the piece of code you have mentioned. It is my strong belief that Previously axi_clk was probably generated this way and later on converted to the way given by you which is much more elegant to look at.
 

Re: Race Condition

//------ AXI CLOCK GENERATION ------
initial
begin
#20; //------ This is to avoid race condition between "initial" and "always" block
axi_clk = 1'b0;
forever
begin
#(AXI_CLK/2) axi_clk = 1;
#(AXI_CLK/2) axi_clk = 0;
end
end
 

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