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overshoot & undershoot of LDO's load transient response

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ldo overshoot

hi,all
I have to design a LDO without external compensation capacitor.The stablity can be ensured by compensating it internal,but, due to lacking of the output large capacitor, the load transient reponse has a large overshoot and undershoot, how to reduce them. All comments are welcome.Thanks.
---San
 

ldo load response

How about bandwidth?
 

reduce undershoot

1> there is a paper about handling damping effect , u can have a look on it... but this is "super difficult" for me, since it need to design more extra circuits to "tackle" the damping effect......

2> if there is no cap, how about the current pass through the Power pmos at final stage ? did u simulate the line/load regulation form 0um to say 100um ? i wondering if this is possible foy PMOS to "operate" when there is no load current provide

3> why you would like to work on without capacitor ? in fact, i also doing on it..but, may be i am not that good/clever on circuit design, it seems to me that without a cap. this is just of "produce paper purpsoe"....in real life.....may be, not that easy for Design For Manacufacting DFM.......................


All are just my feeling on this topic, if there is anythings worng, plz to correct me.....
 

load transient response

To paley: the bandwidth is about 500kHz~1MHz.
To ee_cchac:
1.I don't know which paper you mentioned.
2.Indeed,the stability of light load and no load is difficult to guarantee. Because of the range of my LDO's load is about 0.1k ohm~100k ohm, 1.8V output voltage,so the min load current is 18uA.I must ensure that this LDO is stable when load current is larger than 10uA for some margin.
3.The reason of not using the external large capacitor is that this LDO is fully integrated in the chip,no pin to use.
The zero which induced by external capacitor and it's ESR is replaced by internal zero.
But when load current is to increase sharply,no capacitor to provide this large current,so very large undershoot is produced. vice versa for overshoot.
The problem is how to reduce them.
Hope more people to join the disscussion.
 

transient undershoot overshoot

topics :
A Capacitor-Free CMOS Low-Dropout Regulator With Damping-Factor-Control Frequency Compensation

More, paper about internal zero/pole:
Pole-Zero Tracking Frequency Compensation For Low Dropout Regulator


both paper from HKUST,u should able to find in IEEE ~~ i hope i give u the right assistant to u even i am not good in circuit design...

By the way, where u come from(*country/city*) ?

i am also working on LDO with similiar topics as you, i am too young on circuit design. I also really hope this topics will attract more expert on helping us ~~
 

ldo transient response normal

ee_cchac:
I have read these two papers,hehe!
i am from china,shanghai.i guess you too,are u?
 

transient overshoot compensation

i am HK ar, now having MSc ICDE @ hkust, doing FYP on LDO design.....haha

anyway, add oil, keep in touch ~~

hope more experts will give us help and fresh idea ~~
 

damping overshoot & undershoot

I think 500kHz~1MHz is very small.

i'm from chengdu, my QQ is 95689136 , keep in touch,hehe
 

ldo load transient pole

Generally,1MHz bandwidth is enough in most LDO's design.Indeed, the larger BW the better,but it is very difficult to guarantee the stability for the existence of three low frequency poles.
 

u must add a decoupling cap. at the output to enhance the transient response , this cap. should be in range of hundered's of pico's (>100pF) , this will make the cap. responsible for suppling hiugh frequency current , but it will affect the stability since it is now the non-dominant pole
 

Re: overshoot & undershoot of LDO's load transient respo

safwatonline,i have no pin to use, so this hundred pico's capacitor will take up large area on the chip.
 

Re: overshoot & undershoot of LDO's load transient respo

i know but this is normal , u usually use on-chip decoupling caps , this should be Ok in any chip as u can put the decoupling in any of the free area on the chip
 

Re: overshoot & undershoot of LDO's load transient respo

You have to use the quiescent current boosting technique for increasing the available slewing current at fast transient load changes, plus a enhanced bulk effect connection for the pass transistor, which further improves the transient response of the LDO.
 

Re: overshoot & undershoot of LDO's load transient respo

fast transient feedback to decrease output impedence
 

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