Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

How to design a USB PHY IP?

Status
Not open for further replies.
V

visualart

Advanced Member level 1
Joined
Dec 21, 2001
Messages
466
Helped
28
Reputation
56
Reaction score
4
Trophy points
1,298
Activity points
3,333
Hi, dear all,
I am searching USN20 PHY. But How to design the its PLL? Hot to reduce the jitter? How to ensure the right sample? How to deal with the effect of temperature in the BIAS block?
Pls give your advices. Or may exchange with the IP.

Tia
visualart
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top