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Different between Verilog, VHDL and systemC

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different between systemc and vhdl

Hi everyone,

I have been using Verilog HDL in the past. however, I have not not use VHDL or systemC. I understand that both VHDL and systemC are HDL. I am wondering what is the advantage by using VHDL or systemC over Verilog HDL. Can you guy explain this for me.

thank you
 

First, I think this question should be asked in th FPGA Design section
Second, if you do a little search in the forum and the internet you'll see this subject was discussed many times. If you still don't find what you need, somebody here will give you an explanation, I'm sure.
 

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