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Help needed about fully folded cascode OTA with PMOS input

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yonzzan

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I am designing fully folded cascode OTA with PMOS input and CMFB. Whenever I run Cadence, the simulation result is way different from my hand calculation result and I am having hard time to make my OTA work on operating point and I really don't know what to do..

I would very much appreciate if you could give me any advice or send me some papers or good sources I can refer to. (step by step tutorial)

Best Regards

Added after 1 minutes:

TSMC 0.18 micron technology
DC gain:60dB
Gain bandwidth product:500MHz
Phase Margin: 60
Output swing: 1v P-P
Output Load: 2pF
Slew rate: 20v/usec
fully differential..

Added after 6 minutes:

For this design, Which Vdd should I use
1.8V or 3.3V?

And What L do I need to use? 0.18um, 0.36um....0.90um........or 1.8um???????????
 

Re: Help needed about fully folded cascode OTA with PMOS inp

for analog circuit performance, i think that the length should be set 0.35um, vdd 3.3V.
hand calculation is not same to the results of simulation, it's normal, you need adjust the parameters, but in order to make the circuit work correctly, the circuit should be configure appropriately. firstly, have a ideal cmfb circuit or a ct cmfb amplifier, then, use appropriate bias or ideal bias.
the first step, simulate the dc operational point, make the outputs is cm point.
then, simulate the ac response, and adjust the parameters to meet the spec.
 

Re: Help needed about fully folded cascode OTA with PMOS inp

Could you post your circuit and how you simulate it.
 

hi gingerjiang,
how to simulate the dc operational point?
regards,
 

Re: Help needed about fully folded cascode OTA with PMOS inp

this paper maybe helpful
 

Re: Help needed about fully folded cascode OTA with PMOS inp

sissi said:
hi gingerjiang,
how to simulate the dc operational point?
regards,

u can simply do dc analysis by saving op.point.
give a dc input and sweep it rail to rail.
 

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