Whether dummies should be kept floating

In our analog IC layout we have a doubt whether to connect dummies to VSS or VDD or to leave floating. Which is the effective layout can any one help with this..

Added after 53 minutes:

jagadeesh said:

In our analog IC layout we have a doubt whether to connect dummies to VSS or VDD or to leave floating. Which is the effective layout can any one help with this..

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My view is that of beginner but I can back it up:

As shielded wires should have the shield grounded, I think that dummies must be tied to one of the two potentials of the IC
1. for not to cause unexpected effects rather than having a specified behavior
2. To be used as shields or guards to the device or the circuitry they protect.

Usually dumies are used in order to have symmetry for side to side devices during process but nevertheless are "active" matterial. Therefore I believe, depending on the surrounding, that one should tie them to a certain potential ( clear dc or clear ground).

As sais at the beginning I am not an expert on this - I am trying to become though- and I would be glad to see an experts opinion backed it up with true examples.

D.

I do agree with dkace`s point of view. It is always preferred to connect the dummies to the respective power rail, in case of dummies connected to NFETs, dummies have to be connected to VSS and in case of those connected to PFETs, connect the same to VDD.

If the dummies are kept floating a static electrical charge can accumulate on the dummy segments.This charge might influence the behaviour of the adjacent devices.Any possibility of electrostatic modulation can be eliminated by connecting the dummies to the respective power rails or some other suitable low impedance node.
I hope this helps.....

Don't leave anything floating, period. Tie to a potential, usually the supply rails, but it can be any node, like to the substrate.

During the fabrication process the DRIE step (and others possibly) leave charge on anything floating. Once the insulator (SiO2 or interlevel dielectric) is deposited on top and around everything, then the charge will be trapped there , forever, or worse, it'll leak away over the years. This modulates conductivity of electrical devices nearby (think EEPROM-like behavior). The charge build-up during fabrication might also be high enough to rupture the insulation betwen the dummy and something else, and then you'll have a short between node, through the dummy. Think "ANTENNA RULE" .

Layout people are aware of this (most of the time?).