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memory implementation onto FPGA

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vinodkumar

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Hi.i am doing a project in which i need to give the input data of 256 depth and 16 bit width.i would like to implement onto FPGA.
i heard frm friends tht i need either write fifo or sram for tht.i know how to write a synthesizable code for that.my pb. is how to configure it onto FPGA and load the data into them.

one friend told already block-ram will be there use it.but i dont know this too.which is the best way or any other way is good in doing such tasks.

i would like to use spartan3/3E kit.

plz respond

thanks in advance.
 

Do not write them, use corgen instead.
 

vinodkumar said:
Hi.i am doing a project in which i need to give the input data of 256 depth and 16 bit width.i would like to implement onto FPGA.
i heard frm friends tht i need either write fifo or sram for tht.i know how to write a synthesizable code for that.my pb. is how to configure it onto FPGA and load the data into them.

one friend told already block-ram will be there use it.but i dont know this too.which is the best way or any other way is good in doing such tasks.

i would like to use spartan3/3E kit.

plz respond

thanks in advance.

You have two ways:
1. You may write synthesizable block which consider SRAM (You already did). Then FPGA tools will generate automatically your RAM. You should not be involved in this case.

2. To work smart and generate your RAM directlly from the FPGA tools.

In designs that are not BIG both ways are relevant. But although the 2'way is still the best one.
 

Xilinx has one xst.pdf which is for xlinx syntheis reference guide. They have shown lots of examples of memory coding styles which will automatically infer the block rams (if you are using xilinx as synthesis tool).

Alternatively if you are using some other synthesis tool like synplify_pro etc. try the same code . If it is not infering block RAM then, use attributes or pragmas to tell to synthesis tool to synthesize as block ram


bye
ram
 

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