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design a decimator for a sigma delta AD modulator

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ellin_tan

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hello every one, i have to design a digital decimator for a 24bit-ΣΔ AD modulator,using a DSP(TMS320VC33,did anyone use this chip?),how can i design a comb filter ,a FIR filter with this chip? furthermore,if the output of the ΣΔ modulator is 256kHZ bits stream ,how can i change this bit stream into a 100HZ 24bit resolution ADC output by a decimator?
i appreciate your help.
 

I also design a decimator for sigam delta AD converter now.

Pls share some material on this item. Tks!
 

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