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it is that minimum voltage(vertical force) one has to apply to push the substrate down so that a virtual horizontal channel may be formed between the drain and source to allow the flow of electrons(current) through that newly formed channel. Vgs is the voltage you apply and Vt is determined by the process technology.
you can refer sedra and smith or any classical electronic book for a more in depth analysis.
for a NMOS, if you would like to get a strong inversion region below its gate, the mimimun gate voltage is the threshold voltage. if the gate voltage become larger than the threshold voltage, the channel resistance become smaller, and the drain current will become larger.
in short , the drain current is produced by overdrive voltage and the drain voltage if the over-drive voltage is zero,the drain current will also become zero neglecting the sub-threshold region.
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