Slew rate vs Settling time

linear settling slewing

I have a doubt.
Please tell me whether I am right or wrong:

Slew Rate is calculated by large signal analysis.
Settling Time is calculated by small signal analysis.

thanks
sarfraz

ota settling time simulation

yes it is right.

calculate sr from settling time

Sorry, mist, but you are wrong.
Slew rate is the velocity of responce at the output of the amplifier ΔVo/Δt, andit accours at the begining of the responce of Vo.
Settling time has to do with ζ , damping factor, and ωn ,natural frequency, and is thetime needed to get stable the signal.

slew and settling current calculation

The book of P E.Allen will tell you the diffrences of them.

how can simulate settling time

Slew rate is nonlinear,usally occure when large signal.Settleing time is linear,OP is linear when input is small signal.

damping factor and settling time

Here there are a few different things named the same.
When saying settling time there are many different definitions.

a) Settling time defined different ways but mainly it means for some initial value to final target value settling. Final accuracy may be defined for example as 2% settling or 90% settling etc. Also it can be defined from 10% to 90%. Also it can be definet to 50% crossing etc. etc. If amplifier slews than settling behaviour has small signal (linear) region aroun starting value and final value but in between where it slews there will be slewing region where output follows more or less a straight line due to slewing (since differential input stage stears all the tail current into one side and compansation capacitor charged by this tail current. Because tail current is limited by design if amplifier input driven faster tail current cannot charge compansation capacitor as fast (compansation capacitor voltage charge shows constant slew since constant current charging the capacitor) and output slews (follows compansation capacitor voltage change rate). When slewing amplifier is no longer is in linear region of operation and output lags the input.


b) coming out of slewing and final output is aproached there will be overshoot/undershoot and than depending of loop damping factor there will be slow settling tail likely also some damped oscillation until output stays solid at final output value (could be DC offset i.e. DC error but output settles to DC value) this portion of settling is called small signal settling. Amplifier here is in linear operation.

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Large signal analysis: when input excursion large so amplifier devices changes their DC values like terminal currents and volatges so that operating point changes. When operating point changes small signal analysis is not valid whole circuit can not be locally linearized around overal non-linearly moving operating points. State of the whole circuits (poles zeros eigen values moving) changing.

Slewing amplifier has large input so we do large signal analysis.

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Small signal analysis: when DC values stays almost the same (input voltage is small) so whole circuit can be modeled by local linearization and treated as a linear system.

During amplifier output final small signal settling tail input voltage is very small. As a result DC terminal voltages of devices changes very little. We can linearize localy the whole system aroun these DC operating point and solve system equations for poles and zeros.

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I hope I am not going to confuse anyone and this explanations clerify the issue.

slew rate calculations error amplifier

If you want to simulate slew rate and settling time you could do this both by a nonlinear transient simulation. To simulate the slew rate take a large signal step as input signal (e.g. for a voltage amplifier with in input range of 3 volts a voltage step of 2V or more), the output signal is slewed and you could measure the output slope. If you want to measure the settling time (the time a signal needs to be within a certain range) use a small signal, therefore the output signal will be not slewed and you are able to concentrate on the swinging/ringig behaviour of the signal.

ota settling time

Ok thanks for the response
So I can conlude that for Slew rate calculations perform large signal analysis
For settling time calculation perform small signal analysis

slew rate settling time

Can someone post the test circuit of testing settling time?

slewing current settling current

You can config the circuit in voltage follower mode and do .tran to find the settling time.

ota slew rate test

hackjiang said:

You can config the circuit in voltage follower mode and do .tran to find the settling time.

Click to expand...

Then slew rate and settling time can find out as the same time, right?

settling error slew rate

settling time is composed of two distinct periods, slewing period and linear period.
I think this paper writed by P.R.Gray will give you more advice.

slew linear settling

shaq said:

hackjiang said:

You can config the circuit in voltage follower mode and do .tran to find the settling time.

Click to expand...

Then slew rate and settling time can find out as the same time, right?

Click to expand...

The test circuit for slew rate should be connect in open loop.

settling time damping factor

and this paper give us a model to analysis the settling behavior of OTA.
It clearly talk about the two peirods.
I think it's useful.

slew rate

Thanks fan.

settling time and slew rate

hackjiang wrote:

The test circuit for slew rate should be connect in open loop.

Click to expand...

i think i'm not agree with you.
i think connected in open loop is not the method to test slew rate. if you do this, the ota will not work well when you add a step signal at the input.
The ota should be connected in unit gain loop. Then add a step signal Vin at the input. When the output equal to Vin, the time is slewing time, not settling time, and Vin/tslewing is SR.

If you want to know more, please take a look at chapter 6 in Allen's book.

settling simulation

Pls check the book written by Allen: Cmos analog circuit design, I think this should help

slew rate and settling time

you can calculate the small signal work area with the joint set 0f SR and settling time.