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About hsim & verilog co-simulation

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waosai

waosai

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hsim cosimulation

I am now doing an interface checking between digital and analog part in a full chip using hsim. But I am confused with co-simulation. I have try the example provided in hsim manual but not sucessful.

Anybody has the experience of co-simulation?
Please help me.

Thanks a lot!
 

hsim verilog

waosai said:
I am now doing an interface checking between digital and analog part in a full chip using hsim. But I am confused with co-simulation. I have try the example provided in hsim manual but not sucessful.

Anybody has the experience of co-simulation?
Please help me.

Thanks a lot!
Click to expand...

You can not use hsim & verilog to do the mixed simulation at the same time.

For system level verifications, one method is to develp the behavioral model for your analog block with verilog code. Then you can do the top level verifications with verilog.
 

hsim verilog co-sim

it won't work with hsim. it's a liar
 

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