Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Re: about crystal oscillator(the higher freq., the lower jit
The jitter have a frequency spectrum which is expressed as phase noise over frequency. It is composed from 1/f noise and falt noise. The noise floor depend on the output stage comparator input refered voltage noise density and amplitude. The 1/f noise depend on the crystal Q and amplitude.
For the Q there is an optimium between 1-10MHz. I guess you are interessted in the best jitter for an fixed multiplied frequency and searching for the best reference frequency. If the 1/f corner of the crystal is typical low (1-10kHz) the jitter will be dominated by the the phase noise floor. The jitter is then the sampled noise of the comparator. So now the frequency question:
The jitter measured as Trms is equal at every edge! If the sampling frequency is low the phase is also low. But the reference phase noise get's multiplied. So at the multiplied frequency the phase noise is equal.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
