emadi
Advanced Member level 4
Hi everybody
I am using Xilinx Ise8.1i with modelsim6.
My modelsim has xilinx schematic libraries and then I had no problem with simulating my projects, but when I made a project that it contains 2 schematic Macro model in top level schematic...I see an error when simulating.
THAT ERROR IS:
****************************
Error loading design
# Error: Error loading design
# Pausing macro execution
# MACRO ./sch1.fdo PAUSED at line 7
****************************
If anyone knows the reason for this problem with macros...please tell me.
Thank you very much.
I am using Xilinx Ise8.1i with modelsim6.
My modelsim has xilinx schematic libraries and then I had no problem with simulating my projects, but when I made a project that it contains 2 schematic Macro model in top level schematic...I see an error when simulating.
THAT ERROR IS:
****************************
Error loading design
# Error: Error loading design
# Pausing macro execution
# MACRO ./sch1.fdo PAUSED at line 7
****************************
If anyone knows the reason for this problem with macros...please tell me.
Thank you very much.