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auto zero of latch comparator?

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melodyseu

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auto zero comparator

Hi, everybody.
How to cancellation offset voltage of latch comparator by auto zeroing?
Is there any good papers discuss about it?
 

site:www.edaboard.com aoq

By auto zero I assume that you mean that the comparator offset is automatically zeroed even as it drifts up and down from temperature and other effects.
If this is what you mean, I don't think there is any way to do it electronically.
You could build an elaborate circuit to measure the offset and then apply a compensating voltage on the reference pin.

However, there are certain applications where it can be minimized. In a dual-slope A-D conversion for example the effect of the comparator offset is to simply change the 'gain'. So by applying a known input and using the result to calculate a gain correction factor you can effectively cancel it, but you need a microprocessor.
 

auto-zero comparator

I think you can refer to Razavi books, "Design of Analog CMOS Integrated Circuits". there is a section on auto zeroing.
 
how autozero work

Auto-zeroing a comparator? Really? I'd like to hear more about this.
 

comparator autozero

Maybe u need add preamps with capacitor couple
so than u can do input or output or multi-stage offset cancellation
the residue offset is mainly determined by the gain of preamp

see razavi's book for detail

Best Regards :D
 

auto zero preamp

Your reply makes no sense to me. The only thing I can guess from it is to amplify the signal so the effect of the offset is minimized? That's not auto-zero and usually not possible in system that takes full advantage of the comparator's input range - which is good design practice.
I still maintain that there is no way to auto zero a comparator.
Is Razavi's book available online? I'd like to see how he auto-zeros a comparator.
Or hear from someone who can explain it (clearly).
 
auto comparator

Autozero-Comparator:

1. Have two phase clock.
2. Latch the comparator result at the end of the first phase.
3. Switch the input to zero reference at the start of the second phase
4. Charge up a compensation voltage or current so that the ouput stage of the comparator input stage is forced to the zero condiction of the latch stage. That assumes that the comparator is an input stage and a latch stage. At the end of the second phase the compensation voltage/current is analog latched.

The offset effect of the latch stage is reduced by the gain of the first stage. So there is a remaining effect.

Hope that helps.
 
Ok, I read Razavi's section on Offset Compensation and am not convinced. All three approaches will theoretically work with ideal components, but I don't see any of them as being practical for a comparator. There may be some rare case where you don't care that the input gets shut off for a while every millisecond or so, and that the following stage can slew out of saturation fast enough after the zeroing cycle, but for the most part, there are just too many pifalls. Even Razavi says there are 'serious' problems. Normally a comparator needs to be on all the time or it may miss a transition or an entire pulse. None of these methods is acceptable if that's the case.
 

If autozero is used sometimes the normal operation should be disable. If have a clocked system the comparator value is needed only at one edge.
 

There is not a section on "auto zeroing" in Razavi's book.
Not even "auto zeroing" mentioned in that book!
In what page you found "auto zeroing"?
Does anybody have a good(and complete) reference(I mean book) about auto zeroing and it's techniques.
 

You can find it in chapter 13 part 13.2 and also this may help:
CH.C.ENZ and G.C.Temes , " Circuit Techniques for Reducing the Effect of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling,and Chopper Stabilizat" PKOCbtDlNGS OF THE IEEE, ,VOL 84, NO 1 1 , NOVEMBER I996
 

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