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The duty cycles requirements for the input of PLL and CDR

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chang830

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Hi,
Anyone would pls. tell me what is the duty cycles requirement for the input signal of the PLL and CDR(clock and data recovery),respectively?

Thanks in advance
 

This is dependant on your PFD. If the PFD is based on the D filp flop, then Duty cycle is not a problem. This is the normal case
 

    chang830

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Re: The duty cycles requirements for the input of PLL and CD

yes cdr needs
 

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