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problem about the buffer in differencial voltage reference

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lgqfang

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we are now designing a differencial voltage reference, where the voltage reference is 1.97V and 0.97V. What should we care about when we design the buffer? and what's the request about the buffer if the differencial voltage reference
is used in a ADC? Thank you .
 

No offset. some big driver are requirement
 

Re: problem about the buffer in differencial voltage referen

lgqfang said:
we are now designing a differencial voltage reference, where the voltage reference is 1.97V and 0.97V. What should we care about when we design the buffer? and what's the request about the buffer if the differencial voltage reference
is used in a ADC? Thank you .
Click to expand...

fast settling
low noise
low offset
 

Re: problem about the buffer in differencial voltage referen

Does anyone has any idea or reference for implementing this differential buffer?

Thank You
Sachin
 

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