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  1. #1
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    problem about the buffer in differencial voltage reference

    we are now designing a differencial voltage reference, where the voltage reference is 1.97V and 0.97V. What should we care about when we design the buffer? and what's the request about the buffer if the differencial voltage reference
    is used in a ADC? Thank you .

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  2. #2
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    problem about the buffer in differencial voltage reference

    No offset. some big driver are requirement



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  3. #3
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    Re: problem about the buffer in differencial voltage referen

    Quote Originally Posted by lgqfang
    we are now designing a differencial voltage reference, where the voltage reference is 1.97V and 0.97V. What should we care about when we design the buffer? and what's the request about the buffer if the differencial voltage reference
    is used in a ADC? Thank you .
    fast settling
    low noise
    low offset



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  4. #4
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    Re: problem about the buffer in differencial voltage referen

    Does anyone has any idea or reference for implementing this differential buffer?

    Thank You
    Sachin



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