Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

folded cascode opamp slew rate

Status
Not open for further replies.
A

a_zai

Newbie level 3
Joined
Aug 1, 2006
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,309
hi

can someone explain to me why slew rate (rising and falling edge)for folded cascode opamp not equal???

thanks
 

This is because of different current source and sink capabilities.

Let's assume NMOS input pair
1)Current sink for differential pair is Iss
2)Current source for both differential pair and cascode branch is I1
3)Current sink for cascode branch is I2

Normally we set I1=I2+0.5*Iss

If all Iss flows through one input NMOS, another one will be turned off
then SR-=I2-max{(I1-Iss), 0}
and SR+=I1-I2
 

hi bageduke

thanks a lot for your reply...bye the way do u have any notes that i can refer to...

thanks
 

what happend if I1=2*I2?
would SR+=SR- ?

Added after 7 minutes:

And how to caculate SR?
some one suggest
1. 20%~80% rising/falling time
2. 10%~90% rising/falling time
3. Peak slewing.

which one is better?
 

you can find the result in the book of razavi
 

a_zai said:
hi bageduke

thanks a lot for your reply...bye the way do u have any notes that i can refer to...

thanks
Click to expand...


Razavi's book is really a help. And you can also refer to Phil Allen's book

Added after 15 minutes:

st01liyp said:
what happend if I1=2*I2?
would SR+=SR- ?
Click to expand...

Yes. At least this is what I am thinking. But it will consume more power for almost same performance.

And how to caculate SR?
some one suggest
1. 20%~80% rising/falling time
2. 10%~90% rising/falling time
3. Peak slewing.

which one is better?
Click to expand...

I prefer the third one. But when I did measurement, I used the first one.
 

hi

if folded cascode 2 stage...can get gain 500 dB???
 

500dB?

Let's see, 500dB=10^25, I don't think anything can generate such a big gain.

If you mean 500=54dB, this could be okay
 

I think slewing phenomena is much more complex than that describes in razavi. It may caused by first stage and second stage later, and miller effect will slow down the slewing in second stage.
 

Problem with with small output stage current (I0) is when one part of the output stage has no current during the slewing, and you need more time for recovery from off state. This problem could be solved setting slightly higher (1.5*I0) current of the output stage but then dc gain drops (because of ro~1/I).
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top