Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Sample and Hold - "start convert" delay

Status
Not open for further replies.
S

svensl

Full Member level 1
Joined
Mar 25, 2005
Messages
99
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
2,202
I was looking through datasheets of S/H amplifiers (AD783) and came accross the following statement:

The settling time of the AD783 is sufficiently fast to allow the SHA, in most cases, to directly drive an A-to-D converter without the need for an added “start convert” delay.

Can aynone explain me what a start convert” delay is and why sometimes it is required and in this case not.

Regards,
Svensl
 

Usually there is needed a time to the signal to freeze before the converter start convertion. It dependes of the converter inthe datasheets explains that the signal must be without variations and some other no.
 

But could this not be done by using a slightly delayed clock. In this way the S/H output will have settled and the ADC can then converter the signal.

Regards,
svensl
 

Hello
In some ADC is need to create an S/H circuit controled by the converter.
Some converter have this internaly

Check an simple converter such as ADC0801 it can give you a more precise information.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top