aoshater
Newbie level 6
virtuoso ade
I want to know how to do two things :
1) When creating a long simulation which ends up with 10 million or more points, plotting alone can take around 10 minutes, exhausting the harddrive. I wish to plot certain waveforms which are slow varying, and therefore, i don't care to see all the 10 million points, but rather maybe only 1 point every 1000 points. I want to know what is the command/option to plot reduced points waveforms.
2) Can i for example simulate a certain time, say 10us, and save the simulation status until that time. And then, continue the simulation from that point a no. of times while changing the design, noting that those 10us voltage and current solutions will not change, and therefore, it is a big waste to simulate it every time i change something in the design. I was thinking if there could be an option which could just set all the nodes to the voltages and currents at a time point in simulation.
Just to give an example, a double-loop PLL, in which one loop starts first. After 10us, the PLL switches to the second loop. I change some parameters in the second loop while the first loop remains the same, and therefore, the first 10us are just the same.
Sorry for typing too much, i did go through cdsdoc but i have a time crisis, alot of simulations to carry out, so a little detailed help here would be great!
I want to know how to do two things :
1) When creating a long simulation which ends up with 10 million or more points, plotting alone can take around 10 minutes, exhausting the harddrive. I wish to plot certain waveforms which are slow varying, and therefore, i don't care to see all the 10 million points, but rather maybe only 1 point every 1000 points. I want to know what is the command/option to plot reduced points waveforms.
2) Can i for example simulate a certain time, say 10us, and save the simulation status until that time. And then, continue the simulation from that point a no. of times while changing the design, noting that those 10us voltage and current solutions will not change, and therefore, it is a big waste to simulate it every time i change something in the design. I was thinking if there could be an option which could just set all the nodes to the voltages and currents at a time point in simulation.
Just to give an example, a double-loop PLL, in which one loop starts first. After 10us, the PLL switches to the second loop. I change some parameters in the second loop while the first loop remains the same, and therefore, the first 10us are just the same.
Sorry for typing too much, i did go through cdsdoc but i have a time crisis, alot of simulations to carry out, so a little detailed help here would be great!