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Question about driving capability of nmos and pmos

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icx

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About driving capability

in one inverter,nmos size is wn/ln and pmos size is wp/lp. In order to
design one 2 input nand gate with same driving capability as inverter,what
is the size of nmos and pmos in nand gate?

a.nmos=wn/ln,pmos=wp/lp
b. nmos=2wn/ln,pmos=wp/lp
c. nmos=wn/ln,pmos=2wp/lp
d. nmos=2wn/ln,pmos=2wp/lp
 

Re: About driving capability

hear you are what i think... since a NAND gate involves two series NMOS transistors and two parallel PMOS transistors, and since you need the overall PMOS to NMOS aspect ratios to be about 2 (actually, it is 2.4), you'll need to have Wn/Ln=2 (the overall Wn/Ln now is 1)and Wp/Lp=1 (the overall Wp/Lp now is 2)...

hope this helped...
 

Re: About driving capability

for this OVT's interview test,

2 is correct. but actually the ratio depends on process. normally 3times.
 

About driving capability

i think in the p-network we take worst case senario (i.e. only one of the mos is working) so the wp/lp=2
so i think d is correct
 

Re: About driving capability

safwatonline said:
i think in the p-network we take worst case senario (i.e. only one of the mos is working) so the wp/lp=2
so i think d is correct

that's right... i have mistaken.... safwatonline is correct
 

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