Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

how to increase slope of signal

Status
Not open for further replies.
M

malind

Newbie level 3
Joined
Nov 7, 2005
Messages
4
Helped
2
Reputation
4
Reaction score
0
Trophy points
1,281
Activity points
1,366
A signal is varying slowly. We want it to reach its final value quickly which effectively means increasing the slope of the signal. How can we do it??
This was asked to me in an interview, and a hint was given -- 'use invertors'
Can anyone suggest a solution...

Malind
 

I think that if you used two cascaded inventers with high current, and with large noise margin, it may increase da slope, or decreas rise and fall times..
 

hi,

signal would vary slowly because of high resistance offered to it, we can decrease the resistance by increasing the width of transisitor, correct me if i am wrong.

as W/L is inversely proportional to the resistance.


thanks,
Prasad
 

if this i smeant for a digital buffer driving a large cap., you can use exponential inverter chain as suggested by Rabaey in his book "Digital integrated circuits- A design prespective"

May I ask: where was that interview?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top