Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Advanced Topics in VLSI Design

Status
Not open for further replies.
J

jimjim2k

Advanced Member level 3
Joined
May 17, 2001
Messages
996
Helped
23
Reputation
46
Reaction score
13
Trophy points
1,298
Activity points
7,178
advanced seminar topics in vlsi

Hi

PARWAN is a simple accumulator-based processor

1. h**p://aspire.ucsd.edu/~lichen/260c/parwan/

A. VHDL code
(Synthesizable RTL description)
2. h**p://aspire.ucsd.edu/~lichen/260c/parwan/rtl
(Gate level description)
3. h**p://aspire.ucsd.edu/~lichen/260c/parwan/gate/cpu.vhd
(atpg library used for fault simulation)
4. h**p://aspire.ucsd.edu/~lichen/260c/parwan/atpg.lib

* -> t

tnx
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top