deb_mallik
Banned
can any one suggest variable dutycycle with fixed frequency digital logic circuit
thanks in advanced
thanks in advanced
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module pwm(clk, reset, data, led);
input clk;
input reset;
input [7:0] data;
output led;
reg led;
reg [7:0] pwm_count;
always @(posedge clk or posedge reset) begin
if (reset) begin
pwm_count <= 0;
led <= 0;
end else begin
pwm_count <= pwm_count + 1;
if ( pwm_count <= data ) begin
led <= 1;
end else begin
led <= 0;
end
end
end
endmodule