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  1. #1
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    The digital design flow for Cadence

    Hi guys ..

    I would like to know the exact digital design flow for cadence .. starting from HDL down to GDSII ..

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    cadence asic design flow

    Hi,
    they have their own tutorial links which tells you the complete flow using cadence tools. its available at

    http://crete.cadence.com

    under the "introduction to ASIC implementation"

    hope this helps.



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    site crete cadence

    hi,
    rtl -> rtlcompiler -> first encounter -> gps -> nanoroute



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  4. #4
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    cadence synthesize power plan

    Quote Originally Posted by linuxluo
    hi,
    rtl -> rtlcompiler -> first encounter -> gps -> nanoroute
    what's (First Encounter) for ?
    GPS ?
    Nanoroute ?

    are all these tools embedded in SoC Encounter ?

    and where can I use a tool like Assura or Diva ?



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    cadence design flow




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  6. #6
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    fe gps cadence

    FE (First Encounter):
    - Prototyping tool --> floor plan, power plan,...

    GPS (Global physical synthesis):
    - Use the same keyword of "global synthesis" from RTL Compiler.

    NanoRoute:
    - Router (global route + detail route)
    ----------------------------------------------------------------------------
    SOCE 5.2 = FE + RTL Compiler + sRoute + NR + crosstalk analysis (Celtic) + ...

    -----------------------------------------------------------------------------
    SOCE does not contain sign-off DRC/LVS features.
    ------------------------------------------------------------------------------

    Cadence RTL-to-GDSII flow:
    - 1) synthesisDesign
    - 2) planDesign + APP(automatic power plan)
    - 3) placeDesign
    - 4) clockDesign
    - 5) globalDetailRoute (routeDesign)
    ------------------------------------------------------
    - 6) ecoDesign



  7. #7
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    introduction cadence design flow

    Quote Originally Posted by sree205
    Hi,
    they have their own tutorial links which tells you the complete flow using cadence tools. its available at

    h**p://crete.cadence.com

    under the "introduction to ASIC implementation"

    hope this helps.
    The CRETE website is no longer supported. and I can't get that paper, can you kindly upload it here?

    Thanks,
    Ahmad,



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