bad_egg3
Newbie level 1
who can give me a 5th-order delta-sigma source code with verilog or VHDL,just i am graduating from my school,but my code was simulated failure. if have no code ,i won't have a paper for graduation .anyone help me ? help ! help !
my mail: bad_egg3@yahoo.com.cn
pls send to my mailbox ,thanks in advance!
my mail: bad_egg3@yahoo.com.cn
pls send to my mailbox ,thanks in advance!