Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

How to realize a floating diode in digital CMOS process?

Status
Not open for further replies.
L

leonken

Full Member level 3
Joined
Jun 12, 2004
Messages
169
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
1,437
floating diode cmos parasitic pnp

I need a forward biased diode in a pure digital CMOS process. The minus terminal of the diode must be floating.
The conventional method, such as p diffusion in nwell, exists the pnp transistor.

Any other method to realize a floating diode in digital cmos process?
 

cmos floating diodes

Maybe you can use channel pnp with B shorted to C, or a PMOSFET with G conneted to S and B connected to D. But it has a parasitic vertical pnp transistor.
 

Hughes said:
Maybe you can use channel pnp with B shorted to C, or a PMOSFET with G conneted to S and B connected to D. But it has a parasitic vertical pnp transistor.
Click to expand...

What is a channle pnp in CMOS process?
 

I think that there is no way to have floating diode in pure digital cmos process without parasitic pnp transistor
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top