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Re: intuitively, in pll,why loop bandwidth <=1/10 referen
when u azalyze the PLL as a feedback system we use S domain , which mean that u assume that the PLL is a countinuse time system
but actually PLL is sampled system cause it contain a digital part PFD
so we need the bandwidth of the loop to be at leat 1/10 of the refernce frequency to insure that any variation id the loop condition will be fast . and the loop sense that the refernece is continuse
this is called continuse time approximation of the PLL
if u want to design a PLL with loop bandwidth greater 1/10 of refernece frequency
u will need Z domain techniqucs to analyze the PLL
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