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passing real values in verilog??

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itheman

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pass real

Is there any way to pass real-values thru input/output ports in verilog-xl?
 

itheman said:
Is there any way to pass real-values thru input/output ports in verilog-xl?
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Not in Verilog, there are 2 system tasks:

$bitstoreal, $realtobits that will convert real <-> 64 bit reg - that should help you here.

HTH
Ajeetha
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$bitsto real and realtobits may not work. Since I can use this only if I declare the inputs and outputs as 64 bit wires. Any other suggestions? (Thanks in advance)

Thanks
 

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