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How to reset D flip-flops in a register

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I have a register made of 5 D flip-flops and 4 full Adders on top of it. What this register does is it has to start from zero and send the value stored in the flip flops up to the adder and once the value is added to another value coming from another circuit the result is being fed back to the register as well as being sent to be displayed. (It works like a counter that counts from zero to 31 with optional incerements of 4,2,1 and does not count if no option is selected). I'm using xilinx micro-controller and I need to draw the circuit using logic gates and flip-flops only (I can't use pre-designed tools or code)

First of all is that design correct for that purpose?

Second of all how do I reset the flip-flops at the begining when I start counting (so that the register will have the value 0 0 0 0 0 at the start of the count) ?
 

if you need to clear the register at the time, when optional increment isn't selected, use the synchronous clear

Code: 
process
begin
  if (rising_edge(clk)) then
    if (increment=0) then
      register <= 0; 
    else
      register <= register + increment;
    end if;
  end if;
end process;
 

No I don't need to clear the register when no option is selected. I need to clear it as soon as the power is connected to the board so that it will start counting from zero (ie: there won't be any pre-stored value in any of the flip-flops) And I can't use anything other than logic gates and flip flops to do this.

Added after 5 hours 42 minutes:

anyone else has any idea?
 

I think this is what you are looking for...........
Use reset to initialize counter to zero at power up!

Code: 
module count (clk, rst_n, sel, din, dout);
   input clk, rst_n;
   input [3:0] sel;
   input [3:0] din;
   output [4:0] dout;
   reg [4:0]   dout_nx;
   always @(posedge clk or negedge rst_n)
     if (!rst_n)
       dout <= 0;
     else
       dout <= dout_nx;
   
   reg [3:0]  data2add;
   always@ (/*AS*/din or dout or sel) begin
      data2add = 0;
      case(sel)
        1 : data2add = 1; //inc by 1
        2 : data2add = 2; //inc by 2
        3 : data2add = 4; //inc by 4
        4 : data2add = din;
      endcase // case(sel)
      dout_nx = dout[3:0] + data2add;      
   end
endmodule // count
 

Xilinx micro-controller? Maybe you mean an FPGA or CPLD.

Can't use pre-designed tools or code? What are you using for design entry? Schematic capture using only gates and flip-flops?

If you are using *only* gates and traditional flip-flops, then you have no way to initialize the flops upon power up. You need an additional reset input, or you need to take advantage of the FPGA/CPLD feature that initializes the flops during start-up.

Sounds like you need to design your sequential logic using flops and gates by using whatever paper-and-pencil methods you have learned, and then enter that design into the Xilinx tools by using schematic capture or HDL, whichever is required by the project.
 

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