Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

De Q'ing resistor purpose

Status
Not open for further replies.

vikramc98406

Full Member level 1
Joined
Nov 30, 2007
Messages
97
Helped
8
Reputation
16
Reaction score
6
Trophy points
1,288
Activity points
1,939
Hi ,

Can any one help understand the purpose of De Q'ing resistor?
any links related to these are helpful.

Thanks in advance
vikram
 

Hi,

if you are talking about decreasing the Q factor of an RLC circuit, the resistor is used to dissipate power, thus reducing the Q factor. Q is defined as

Q = 2 • π • (Energy stored / Energy dissipated per cycle).

By introducing a De Q'ing resistor, this resistor dissipates energy.


For a practical RLC parallel circuit Q is given by [1, page 26]

Q_par = 1/R • sqrt(L/C)

and for a series RLC by

Q_ser = ω_0 • L/R = ω_0 • 1/(R • C).


As you can see, the series resistor (in both circuits) leads to a decrase of Q.

[1] https://tiij.org/issues/issues/winter2010/files/TIIJ%20fall-winter%202010-PDW2.pdf

greets
 
Last edited:

As the question is posted in PCB Layout rather than RF or Analog Design section, I fear it's really unclear what "De Q'ing" resistor means for you. Please give a typical example.
 

Thanks Stenzer.

I think i have some starting point to understand this.

Thanks
Vikram
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top