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Why is it necessary to disable interrupts when loading transmit data into transmit bu

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jani12

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Our application is Advanced Drive Assist Systems(ADAS). Our Electronic Control Unit(ECU) contains Two Renesas RH850 / U2A16 Microcontrollers. Our Embedded Software Design is based on ETAS Autosar version 4.x RTOS. Two Renesas Microcontrollers communicate with each other over Renesas High Speed Serial Interface (RHSIF). Communication is full duplex. Each microcontroller has differential pair for transmit and differential pair for receive. One microcontroller is Master. Other microcontroller is Slave.

Basically, our embedded software organization is Application Software and Low-Level Software. Low-Level Software running in each microcontroller provides separate transmit (Tx) and receive (Rx) Buffers for the message data for RHSIF bus connected to the Microcontrollers. Application software provides low level software with number of bytes and transmit data to load in the transmit buffer. Low-Level SW checks the transmit status to ensure a transmission is not in progress before copying the data to transmit buffer..

The requirement from the Application SW is: Low-Level SW shall execute the data copy as an atomic operation (no interruption) so that an interrupt delay cannot result in partially updated data being transmitted.

Why atomic operation? Why not finish updating transmit buffer after interrupts are serviced?
 

Hi,

It depend on
* how the data buffers are organized in software
* and how the the microcontroller (periferal) handles the data transfer.

A think it's a good idea to post the UART interface part of the software.

Klaus
 
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    jani12

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An 'interrupt delay' should be negligible, according to best practices there should not have any routine with significant latency from inside interrupt vector, but as said above whithout details on the code we can only guess.
 
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    jani12

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This is called 'the race condition' - it is the situation when data transfer can be interrupted and data will be corrupted because of that. If you are completly sure that you will prevent that, no point to disable the interrupt this time. To avoid that ring buffer or multiple buffers should be used depends of requirements.
 
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