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Common Choke On The Return Path

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strahd_von_zarovich

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Hi,
I planning to use common chokes on power distribution board to isolate modules's power. However, there are signal lines(UART and I2C) between modules. So there are two common chokes on the return path for I2C and UART signals and this anoys me so much. Common chokes are PL8205NL from PULSER. They have 768uH inductance. Max I2C speed is 400kHz and max UART baudrate is 9600. Is there anyone who has design like this. Is there any chance that I may face a problem. Here the schematic;

Power Board Common Choke Problem.PNG

Thanks in advance.
Canberk
 

Hi,

I think the FPGA ground and the common ground should be connected at a SINGLE point as well as the Laser GND and the common ground. This allows the return signal to flow back towards the common GND. Note, for signals operating at 400 kHz the return signal takes the path with the lowest impedance (NOT resistance!), which is in this case in the vicinity of your (forward) signal line (SDA, SCL, ... ). Thus you should route this lines close (or above, multilayer board) those (two) GND connections.

This single point GND connection is usually done to connect e.g. a digital GND with an analog GND plane. See also the following two links:

http://www.hottconsultants.com/pdf_files/june2001pcd_mixedsignal.pdf
http://www.analog.com/media/en/training-seminars/design-handbooks/Basic-Linear-Design/Chapter12.pdf

greets
 

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