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The following pictures shows part of the result from "technology map viewer (post-mapping)" for a simple FSM design. As I double click on the right LOGIC_CELL_COMB, nothing is shown. I expected to see in the internal structure (gates). Should I do something else?
View attachment 159416
Yes, the technology map viewer shows the flip-flops. It also shows the combinational logic cell, but as a unit cell. It doesn't get to gate level. If you look at the netlist navigator, as you expand down, you will see ports, registers and atoms. These are basically ports, flip-flop registers and combinational logic cells, respectively. They are the farthest you can go with Quartus Prime.It is Quartus.
The RTL diagram is shown below. The FSM is shown as the current_state block. When I double click on the block, I see the FSM and not the flip flops.
So, the map viewer shows the flip flops while not showing combinational logic. On the other hand, the RTL is the reverse.
To see the logic, just click on the properties in LOGIC_CELL_COMB context menu.
View attachment 159420
Right. Thank you.To see the logic, just click on the properties in LOGIC_CELL_COMB context menu.
The code is attached.
Right. Thank you.
I also tried Quartus II 12 and by double clicking on the component, I shows the logic.
The problem is solved.