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How to build sample and hold circuit?

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dl09

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i know a sample and hold circuit consist of a capacitor and transistor that acts as a switch and a buffer amplifier. could i could i use a common collector
amplifier as the voltage buffer and sample and hold circuit will still sample the input and hold the sample?
 

Yes, a common-collector(emitter follower) would work since it has a high input impedance. But there are better solutions: mosfet, opamp. Show us a circuit.
 

Many things matter, which are not usual for an
op amp. Settling time, droop rate, sampling
pedestal. But the amplifier attributes still are
on the table. AVOL (gain error), VIO, CMRR,
PSRR, slew rate (part of settling time) etc. all
are roll-up error contributors which will be
embedded in the eventual digitized data.

JFET input op amp may be the best piece-part
along with an analog switch of low charge
injection. The S/H IC design I've done, used
process PJFET for the analog switch and the
buffer (op amp) front end. You might do it in
CMOS and gain the option of adding auto-zero
(avoiding the need for post-fab trimming and
a process whose stability makes this a long
term solution; a process which is so unreliable
that you are called to run "aging analyses" is
not suited to wafer level or package level
trimming).

Approach to some extent follows technology,
or a technology suited to the approach needs
to be found. Which end is driving you? That
is probably the first order of business, the
constraints and care-abouts.
 

Hi,

May I ask why you want to build a discrete sample-and-hold-circuit ... and what you want to do with it?
I guess I never had a demand for it...

Klaus
 

so if i want to build a buffer amplifier out of a transistor, a better choice would be a mosfet transistor. why?

- - - Updated - - -

Hi,

May I ask why you want to build a discrete sample-and-hold-circuit ... and what you want to do with it?
I guess I never had a demand for it...

Klaus

just trying to learn how to build electronics.
 

Hi,

just trying to learn how to build electronics.
I understand. And I appreciate that you want to learn.

You may do whatever you want, but nowadays nobody will build a sample-and-hold circuit from the scratch.
I'd say the benefit for learning is low.
The circuit is difficult to debug and verify. Thus you get no exact feedback on how good your circuit works..unless you have a good working test circuit and measurement devices.

Klaus
 

Hi,


I understand. And I appreciate that you want to learn.

You may do whatever you want, but nowadays nobody will build a sample-and-hold circuit from the scratch.
I'd say the benefit for learning is low.
The circuit is difficult to debug and verify. Thus you get no exact feedback on how good your circuit works..unless you have a good working test circuit and measurement devices.

Klaus

out of curiosity what measurement devices would i need?
 

Pulse generator
Waveform generator (or voltage source if
you don't care about transient performance)
Oscilloscope (for crude measurement)
Special test jig to get high accuracy Vio, Iib,
gain measurements
Decent accuracy voltmeter to measure that
Power supplies
 

Hi,

out of curiosity what measurement devices would i need?
Best is to look into S&H datasheet and application note.

...or to think about the key functions of an S&H circuit.
* precise timing
* precisely tracking the input voltage
* precise voltage holding for a dedicated time
* .. without adding errors (charge injection....)

Raw timing and voltage estimation:
Let's say it should be used for a (low end) 10 bit ADC with 20.000 samples/s and 3V input voltage range.
So 1LSB is about 3mV.
When we go to the Nyquist limit of 10kHz sinewave, fullscale, then it's rise rate is about 45LSB/us (hopefully my mid calculation is correct)...it means 22ns of aperture error may cause 1LSB of output error.

So you need signal generators, timing measurement, voltage measurement with a precision down to 3mV and 22ns.

I'm sure there you can find test circuits for S/H in the internet.

Klaus

Klaus
 
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    d123

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Not sure if you're asking about this sort of arrangement? Two different layouts, with the capacitor in a leg close to a supply rail.

sample-n-hold mosfet experiments 2 configurations.png

Capacitor quickly matches signal voltage, then maintains it until the next clock pulse. It works in simulation anyway, with ideal components.
 

Not sure if you're asking about this sort of arrangement? Two different layouts, with the capacitor in a leg close to a supply rail.

View attachment 159415

Capacitor quickly matches signal voltage, then maintains it until the next clock pulse. It works in simulation anyway, with ideal components.

Good answer, but to a different question. Op was asking for buffer, not switch circuit.
 

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