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Implementation suggestion on memory mapped IO

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Zerox100

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Dear All friends

I have a simple microprocessor core. I want to add some memory mapped IO to it. Is there any sample code (verilog) for this type of IO? Or any implementation suggestion?


THX
 

Hi,

refine your question.
You want code for: The microprocessor, the core, the interface, the periferal?
What interface type, speed, datawidth?

Btw: Don´t expect a response is more detailed than your question.

Klaus
 

You always can have a look into existing opensource cores.

For example, darkriscv has some general I/O mapped into specific memory addresses for debug.
 

Dear All friends

I have a simple microprocessor core. I want to add some memory mapped IO to it. Is there any sample code (verilog) for this type of IO? Or any implementation suggestion?


THX

Thanks for your Reply
I already have the core. I want to add some mapped IO to existing core.

Zx

- - - Updated - - -

You always can have a look into existing opensource cores.

For example, darkriscv has some general I/O mapped into specific memory addresses for debug.

Thanks for your Reply. I will check.

Zx
 

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