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Simulating NMOS as capacitor example

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daniel442

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I would like to ask your opinion regarding NMOS test-bench as a varactor (voltage control capacitor). I am trying to find the properties of Vg,W for achieving a 200[fF] capacitor.
Here is my test-bench :
Untitled picture.png
Calculated C using AC analysis, where - C = I/(V*2*pi*f), I = NMOS-Gate point and V = voltage on gate net.
Is this correct ?
question - we are looking for Cgs here, so can I just take the value from Cadence "Results Browser" ?
 

What I usually do is attach a dc voltage to the gate with the needed dc value and in series with it an ac voltage source with value of 1. Then run ac simulation and plot 1/i, which the inverse of the gate current or the impedance. It has an capacitive behavior. Pick a frequency and calculate the capacitance C=1/wZ.
 

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