OZZAA
Member level 1
I am desinging an amplifier (Class_C) at 5 GHz, using (TSMC 180nm)
I designed it using ADS simulstor and the following figure describes the relation between input and output power.
while the same circuit is designed at Cadence and it gives a great differences between these two circuits, as follows.
I think I made some thing wrong.
what is the wrong for this desinged circuit to make such these differences.
is that for the properties of used ports.
I designed it using ADS simulstor and the following figure describes the relation between input and output power.
while the same circuit is designed at Cadence and it gives a great differences between these two circuits, as follows.
I think I made some thing wrong.
what is the wrong for this desinged circuit to make such these differences.
is that for the properties of used ports.