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Makfile question, why it works?

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ebuddy

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In this Makefile, I see something that I've never seen before:

Code: 
t1: a=1
t1:
     @echo "hello"

Two things I am familiar with:

1. t1 target showed twice in the Makefile. Legal?
2. the assignment statement "a=1" showed up in the place of where prerequisites are expected.

This makefile works. So there is some rule I am not aware of. Could someone explain?

ebuddy
 

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