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Simulating Gain/PM of Constant GM Current Reference in Cadence

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urawizard

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What is the best way to simulate the frequency response of the self biased current source reference (aka constant GM current reference) as seen in razavi textbook?? (basic image below)
reference.jpg

In transient domain, I can inject a pulse and see how the circuit corrects itself if stable. However, I want to see the frequency response and plot the gain and phase margin, but I cannot seem to get it working. I have the following questions:

Assuming there is additional circuitry and thus more than 1 loop i in the above diagram:
-how can I use stb analysis or ac analysis to probe the frequency response?
-Where do I break the loop if I have multiple feedback loops to measure the loop gain?
 

Look up STB analysis in Cadence Community.
 

I know how to use stb analysis. However, my question is in specific to this circuit above assuming I have multiple feedback loops due to external circuitry. I noticed that placing the probe in different parts of this loop for stb analysis actually provides different frequency responses, so there is an issue with multiple-loop stb analysis. Does anyone have direct experience with this?
 

I would say a good point to break the loop i.e. introduce the iprobe for stb analysis is the gate of M2. It breaks the positive feedback loop. The negative loop is from the current into the R and subtracting that voltage drop from the Vgs of M2. That feedback is stable.
 

I know how to use stb analysis. However, my question is in specific to this circuit above assuming I have multiple feedback loops due to external circuitry. I noticed that placing the probe in different parts of this loop for stb analysis actually provides different frequency responses, so there is an issue with multiple-loop stb analysis. Does anyone have direct experience with this?

Refer to this: **broken link removed**

TLDR; Break the loop at a place such that all "sub-loops" are stable and you will be fine. Therefore, breaking it at the gate of M2, as pointed out by sutapanaki, is the easiest way. (Diode connected transistors cannot be unstable!).
 

Thanks for the replies. So my original assumption agrees with your statements. I did try to break the loop at the gate of M2, but I was confused because when I do this then the dc loop gain is a negative value..

However after some thinking, I realized that since this is a positive feedback circuit and the gain is supposed to be less than 1. Thus, a negative dB loop gain actually corresponds to a gain less than 1 which is correct.

With this being said, I have the following question: Is there a way to calculate the general "phase margin" of this circuit? Since the DC loop gain starts negative, there is no actual unity gain value since the gain never crosses zero. How do I quanitfy how stable this ckt is?
 

If gain stays below 0 db, then you can't define PM.
 

Is there any way to "quantify" the stability then for practical purposes?
 

Run transient analysis and inject a disturbance in the loop, see how it settles.
 

Yes, there is a lot of way to do it. Closed loop system is a principle of control system theory and has a long history of research and education.
What you need is to look on "error signal" and determine it characteristic.
The most popular way to do it, is to break the loop, use replica circuit and inject well defined (constant unity signal) at the input of regulator block.

Read following papers:
https://ieeexplore.ieee.org/abstract/document/99170
https://ieeexplore.ieee.org/document/6977998
 

Yes, I am familiar with these techniques but as you can see from the above thread, this circuit is unique in that it has positive feedback with a gain less than 1. As a result, the open loop dc gain starts negative, and there is no way to calculate the 'standard' phase margin since there is no unity gain crossing.

I know I can inject a transient pulse and see the loop's settling response, since the settling characteristics can correlate to an appropriate phase margin... but I guess I wanted to just confirm if there was any other way to also extract the phase margin from the frequency response / bode plot in this particular case.
 

I think if you run stb analysis and for all frequencies your loop gain stays below 0dB, then you are safe. Transient analysis is to confirm that. If, however, the loop-gain starts increasing in magnitude and crosses 0dB or gets pretty close to it, then you should look at the phase response of the loop gain and figure out if the phase change around the loop is such that it comes back in phase with the injected signal. Then it might oscillate at that frequency.
 

In this case, your stability "margin" will be decided by how low your gain is compared to 0dB.
Closed loop TF = G(s)/1-G(s) where G(S) is your open loop transfer function. The fact that it is positive feedback has been taken care of by the '-' in front of G(s) in the denominator. If your loop gain is sufficiently less than 1, then your closed loop TF is approximately G(s). To find the transient response of the closed loop TF itself, you can inject an signal in open loop itself (just make sure your operating points are maintained).
 

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