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  1. #1
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    USB Core and USB Architecture

    1. How function controller transfers are identified to be either targeting Buffer Memory or USB Core registers?
    2. How does function controller exactly know which address of SRAM it should read/write in USB??

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  2. #2
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    Re: USB Core and USB Architecture

    Hi,

    first please explain why you posted in the "RF, Microwave, Antennas and Optics" section.

    To your question:
    Again a very unelaborated question. I assume nobody can help you when you donīt explain what you are talking about.
    Give a link to internet pages. What datasheets and specifications do you refer to?
    Draw a sketch about your idea.

    Klaus
    Please donīt contact me via PM, because there is no time to respond to them. No friend requests. Thank you.



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