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INTEST, EXTEST and BYPASS modes without wrapper in DFT

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mona_patel

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How can we use INTEST,EXTEST and BYPASS modes without wrapper in DFT for design having IP to improve test coverage for ATPG.
Is it affects any other things?
 

I don't understand what you are trying to achieve? You want to do both INTEST and EXTEST? Or you just want to improve test coverage?

A test wrapper is necessary to provide both test access and test isolation. You can't do INTEST and EXTEST without a test wrapper chain placed along the boundary of the core logic.

Unless your design already has an existing boundary IO registers by the ports, then you can share these functional registers with the wrapper cell logic. Though I doubt this is what you are really looking for?
 
Re: INTEST, EXTEST and BYPASS modes without wrapper in DFT(design with IP)

I know that,

we can target coverage within IP of design---INTEST
we can target coverage outside IP of design---EXTEST
we can bypass IP by using BYPASS mode

I dont know how can we implement this modes in scan so that we can generate patterns individually for all of them.
Can anybody help for it.
 

First, you need to add a test wrapper to your core design. DFT compiler can help you with this, but you need to provide it with appropriate commands:


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# specify your INTEST/EXTEST Encoding
define_test_mode INT_TEST -usage wrp_if -encoding {test_mode0 1 test_mode1 0}
define_test_mode EXT_TEST -usage wrp_of -encoding {test_mode0 1 test_mode1 1}
 
# Add wrapper core
set_dft_configuration -scan enable -wrapper enable
set_wrapper_configuration -class core_wrapper -style dedicated
set_scan_configuration -chain_count 2 -test_mode INT_TEST
set_scan_configuration -chain_count 1 -test_mode EXT_TEST



PS: There is still a lot more, depending on your need. I suggest you to refer to the dft user guide.

I dont know how can we implement this modes in scan so that we can generate patterns individually for all of them.

At the some point in your script, after insert_dft, you can issue the following command to output the scan protocol file for each individual mode:


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current_test_mode INT_TEST
write_test_protocol -out <your-file>
current_test_mode EXT_TEST
write_test_protocol -out <your-file>



Those files can be fed into ATPG tool (e.g. TMax) to to produce test patterns.
 
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ok,thanks for your help.
And what about BYPASS mode?

One more thing I want to clear that
Can we not use INTEST,EXTEST and BYPASS mode without using wrapper insertion?
 

And what about BYPASS mode?

The core wrapping flow that I mentioned above doesn't have a BYPASS mode. Tough I know there are similar flows like IEEE 1500 flow and boundary scan flow that provide a BYPASS mode. Again, DFT compiler can help you with those.


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# IEEE 1500 example:
set_dft_configuration -ieee_1500 enable




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# Boundary scan example:
set_dft_configuration -bsd enable



Obviously we need more than just a single line command ... but I am not familiar with 1500 and BSD. I suggest you to look for the user guide.

Can we not use INTEST,EXTEST and BYPASS mode without using wrapper insertion?

I thought I'd answered that in the second post:

A test wrapper is necessary to provide both test access and test isolation. You can't do INTEST and EXTEST without a test wrapper chain placed along the boundary of the core logic.

Unless your design already has an existing boundary IO registers by the ports, then you can share these functional registers with the wrapper cell logic. Though I doubt this is what you are really looking for

IEEE 1500 flow and BSD flow likewise, either you provide your own boundary scan cells or DFT compiler provides one for you. The wrapper cells are circuits that provide your functional circuit with core testing features. You won't be able to test your chip on core/board level without them.
 

hi,
I understand the concepts of core wrapping.
I think we can also use INTEST and BYPASS modes with IP integration concepts.
Can anybody have any idea regarding it?
 

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