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  1. #1
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    [LAYOUT] When pcell is created created, bulk and gate are shorted!

    Hello, guys, how are you?

    First of all, I'm using Cadence and Layout GXL (IC version is 6.1.8). Process is GF_8HP (available via MOSIS).

    I would like to ask if anyone know how to solve the following issue:

    When generating a nfet_rf cell into Layout GXL, I get four erros in the "Annotation Browser". These four errors are short circuit errors. When inspecting the layout cell, I observed that the bulk and the gate rings overvalps one in relation to the other, as both are placed on M1, causing all this four shorts. Let me present you an image of this issue:

    Click image for larger version. 

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    In this image I'm presenting the lower left side of an RF NFET with the option "Substrate Ring" set as "M2 wiring". Note that /B/ and /G/ are shorted via M1.

    If I change the "Substrate Ring" option to "Legacy", those shorts are gone:
    Click image for larger version. 

Name:	fig2.JPG 
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    In this image I'm presenting the lower left side of and RF NFET with the option "Substrate Ring" set as "Legacy". Note that there's no /B/ and /G/ short circuit - all shorts erros are gone.

    So finally, my doubt is: is there any way to remove these shorts caused when the "Substrate Ring" option is se to "M2 wiring"? Additionally, do you guys know why this short is happens (Am I using a wrong configuration somehow?). Going even further, why would this happens to this cell?

    Thank you so much for the time and effort on considering my post. I hope you guys have a great and enjoyable weekend.

    Many thanks
    Fávero

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  2. #2
    Advanced Member level 5
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    Re: [LAYOUT] When pcell is created created, bulk and gate are shorted!

    I do not see the gate contacts. Maybe there is a field / box
    pertaining to how they should project from the body, which
    would then push out the "B" ring.

    But the possibility of a defective PCell can't be ruled out
    at this time with the information at hand.

    If you had a reference layout that successfully used this
    PCell in the "new" (non-"legacy") configuration, its
    properties might hold more useful clues.



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