Junus2012
Advanced Member level 5
Hello,
I saw this layout where the designers extend the NPLUS layer between two PMOS transistors in NWELL technology,
the two transistors are not sharing the drain or the source, so how he can merge the NPLUS layer in between ?
Thanks
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Sorry, the NPLUS are for the NMOS,
However it is the same issue if we talk about PMOS where it is PPLUS, can we extend it between two transistors when they dont share a contact
- - - Updated - - -
here is another image of extended PPlus layer between four PMOS transistors
I am confused because between a two PMOS the NTUB should be in between, but now between them is the PPLUS
I saw this layout where the designers extend the NPLUS layer between two PMOS transistors in NWELL technology,
the two transistors are not sharing the drain or the source, so how he can merge the NPLUS layer in between ?
Thanks
- - - Updated - - -
Sorry, the NPLUS are for the NMOS,
However it is the same issue if we talk about PMOS where it is PPLUS, can we extend it between two transistors when they dont share a contact
- - - Updated - - -
here is another image of extended PPlus layer between four PMOS transistors
I am confused because between a two PMOS the NTUB should be in between, but now between them is the PPLUS
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