purushotham.vlsi
Newbie level 3
How to check un-clocked flops and how to trace the source point for the problem ?
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Could you possibly be more vague? We are not mind readers.
Here, I am asking that
After doing sanity check check_timing , we get to know that how many flops are not getting clocks. For that how to trace where the problem is ? and how to resolve it ?
check your design, check your SDC. trivial debugging. missing a clock is huge.
by checking SDC , we won't get solution for this, I think. Can you please explain briefly.
How to check un-clocked flops and how to trace the source point for the problem ?