Capacitacne tables in UMC 130nm

shlooky said:

Hi folks,

I am trying to do PnR using UMC 130nm (PDK by Faraday) and Innovus by Cadence. I cannot do non-default routing rules and/or RC extraction be cause I cannot generate proper capTable files for various RC corners.

I am using generateCapTbl command, tech header LEF file and Intercap models provided by the foundry (plain text file containing some cap data), but the tool says I should not use such an old format and should not use such an old capTable. Indeed, the tool crashes whenever I try to route the design using NDR or extract the parasitics using the generated capTbl. the only option for me is to omit the captables in MMMC definitions and route the design with gross inaccuracy and default routing rules.

Has anyone come across this issue? I do not have too much experience with such an old PDK. I worked with 28nm and 16nm with QRC tech files....

Thanks shlooky.

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shlooky said:

did try both... encounter and innovus, as well... maybe I should try "stone-age" Silicon Ensamble?
another idea is to sort of device my own captables by running RC extraction in Virtuoso (analog IC design environment by Cadence) for various wire width and spacing combinations...
but still, there has to be a way how to get things running without hacking the official PDK

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