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  1. #1
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    Random Led Blinker on DE10-lite FPGA board: [0-7]LED

    Hi folks,

    I have a problem with my random led blinker on fpga.

    3-4 leds are turning "on" at the same time.

    Although it is random, what I want is that only one led will be "on" at a time.

    It seems that there is a problem with my code that the leds are overlapping there on and off states.

    Before one led turns off, another led will turn on. This makes them overlap.

    -- moderator added code inline --
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    // PROGRAM      "Quartus Prime"
    // VERSION      "Version 16.1.0 Build 196 10/24/2016 SJ Lite Edition"
    // CREATED      "Sat Feb 22 12:52:13 2020"
     
    module WhackAMole(
        clk,
        reset,
        LED
    );
     
     
    input wire  clk;
    input wire  reset;
    output wire [7:0] LED;
     
    wire    [9:0] SYNTHESIZED_WIRE_0;
     
     
     
     
     
    blinking_leds   b2v_inst(
        .clk(clk),
        .reset(reset),
        .rnd(SYNTHESIZED_WIRE_0),
        .LED(LED));
     
     
    randomnumbergenerator   b2v_inst1(
        .clk(clk),
        .reset(reset),
        .rnd(SYNTHESIZED_WIRE_0));
     
     
    endmodule

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    module randomnumbergenerator (
    input clk,
    input reset,
    output reg [9:0] rnd
    );
     
    wire feedback;
    wire [9:0] lfsr_next;
     
    //An LFSR cannot have an all 0 state, thus reset to non-zero value
    reg [9:0] reset_value = 13;
    reg [9:0] lfsr;
    reg [31:0] count;
    reg [31:0] counter;
     
    // pragma translate_off
    integer f;
    initial begin
    f = $fopen("output.txt","w");
    end
    // pragma translate_on
     
    always @ (posedge clk or posedge reset)
    begin
    if (reset) begin
    lfsr <= reset_value;
    count <= 32'hF;
    rnd <= 0;
    end
    else begin
    lfsr <= lfsr_next;
    count <= count + 1;
    // a new random value is ready
    if (count == 32'd9) begin
    count <= 0;
    rnd <= lfsr%8; //assign the lfsr number to output after 10 shifts
    // pragma translate_off
    $fwrite(f,"%0d\n",rnd);
    // pragma translate_on
    end
    end
    end
     
    // X10+x7
    assign feedback = lfsr[9] ^ lfsr[6];
    assign lfsr_next = {lfsr[8:0], feedback};
     
    // pragma translate_off
    always @ (*) begin
    if (rnd == reset_value) begin
    $fclose(f);
    $finish();
    end
    end
    // pragma translate_on
    endmodule

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    module blinking_leds (
    input clk, 
    input reset,
    input [9:0] rnd,
    output [7:0] LED);
     
     
    reg [31:0] counter;
    reg [7:0] LED_status;
     
    initial 
        begin
        counter <= 32'b0;
        LED_status <= 0;
        end
     
    always @(posedge clk or posedge reset) 
    begin
        if (reset)
            begin
            counter <= 32'b0;
            LED_status <= 0;
            end
        else if (counter > 5000000) 
        begin
                case(rnd)
                10'b0000000000: LED_status[0] <= !LED_status[0];    //0
                10'b0000000001: LED_status[1] <= !LED_status[1]; //1
                10'b0000000010: LED_status[2] <= !LED_status[2]; //2
                10'b0000000011: LED_status[3] <= !LED_status[3];    //3
                10'b0000000100: LED_status[4] <= !LED_status[4];    //4
                10'b0000000101: LED_status[5] <= !LED_status[5]; //5
                10'b0000000110: LED_status[6] <= !LED_status[6]; //6
                10'b0000000111: LED_status[7] <= !LED_status[7];    //7
                endcase
                counter <= 32'b0;
        end
        else 
            begin
            counter <= counter + 1'b1;
            end
        
    end
     
    assign LED = LED_status;
     
    endmodule
    Last edited by ads-ee; 25th February 2020 at 01:53. Reason: added code inline with tags

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  2. #2
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    Re: Random Led Blinker on DE10-lite FPGA board: [0-7]LED

    Every 5 million clock cycles, you invert a random LED.
    There is no code to switch off a LED when another turns on.

    I think you should post your code in CODE tags instead of attachments.



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  3. #3
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    Re: Random Led Blinker on DE10-lite FPGA board: [0-7]LED

    I don't get why you have the rnd signal set to be 10-bits it only has 8 states so only needs 3-bits. I would get rid of the inversion of the LED_status assignments and just assign a 1'b1 to the selected LED_status and add a LED_status <= 8'b0 just before the case to ensure each time you have 5,000,002 clock cycles you will clear the last set LED and set a different LED.'


    FYI it's 5,000,002 because you count from 0 to greater than 5,000,000 i.e. 5,000,001. 0-5,000,001 is 5,000,002 clock cycles.


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  4. #4
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    Re: Random Led Blinker on DE10-lite FPGA board: [0-7]LED

    Thanks. I got it now man! It's now working.



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